Resume

履歴書

Hoku Ishibe

Graduate Student
Computer Systems Performance Engineering Lab. (Perf-lab)
Toyohashi University of Technology
1-1 Hibarigaoka, Tempaku-cho, Toyohashi, Aichi, 441-8580, Japan

Education

  • Apr 2026 - Mar 2028: M.E., Toyohashi University of Technology
  • Apr 2024 - Mar 2026: B.E., Toyohashi University of Technology
  • Apr 2019 - Mar 2024: Associate degree, National Institute of Technology Toyota College

Interests

Computer architecture, Programming languages

Honors & Awards

  • Mar 2026, IEEE Nagoya Section Excellent Student Award

Publications

    Presentations

    • Hoku Ishibe: Invited Talk, ABC HW Meeting: The 2nd Research Meeting on Adaptive Bandwidth Compression HardWare, 2026
    • Hoku Ishibe, Ko Ishikura, Kazutomo Yoshii and Yukinori Sato: "Agile Development of a RISC-V SoC Using Chipyard: A Case Study on Accelerated CNN Inference for X-ray Science", RISC-V Day Tokyo 2026 Spring, poster presentation (non-refereed), 2026.
    • Hoku Ishibe: "Highly Optimized Protocol Stacks with RISC-V Ecosystems for Cloud Computing and AI Systems", 2nd MIT-Toyohashi ASPIRE Workshop 2025 Fall, oral presentation (non-refereed), 2025.
    • Hoku Ishibe: "DSL for FPGA-based Low-latency Network Stack in Cloud Computing Environment",ARCHIDE: 2nd Workshop on Architecture Design Methodologies and Ecosystems for HPC and Scientific Edge Computing, oral presentation (non-refereed), 2025.
    • 石部 鳳空, 胡 思已, 佐藤 幸紀："Kubernetes 向けのマイクロサービス自動生成用 DSL の開発", xSIG 2025, 発表番号 24，ポスター発表 (査読なし), 2025.